AR# 36350: 12.1 EDK - How are the block RAM instantiated in the EDK BRAM_Block?
12.1 EDK - How are the block RAM instantiated in the EDK BRAM_Block?
I have connected port A of the BRAM Block to PLB bus via xps_bram_if_cntlr, and made the port B external. The address for the BRAM Block is 32-bit. How do I know which bits of the address bus I should use to access the block RAM?
After PlatGen, a BRAM block HDL file is created in the\hdl\elaborate directory. It shows how the block RAM primitives are instantiated and how the ports are connected. For example,for aBRAM Block with a 32-bit data width, the address bit 30 and 31 would not be used.