AR# 39193

LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - GTP/GTX Physical DRC failure in MAP

描述


In ISE design tools 12.3 and later, implementation of the Ethernet 1000BASE-X PCS/PMA or SGMII example design can fail during MAP with an error similar to the following:

ERROR:PhysDesignRules Block (GTP_DUAL_X0Y0)needs GTP_DUAL_X0Y1 instantiated: When using a GTP/GTX with a REFCLK source coming from the IBUFDS element near another GTP/GTX, each GTP in between the source and destination must be instantiated, have connected power supplies and have its REFCLKPWRDNB pin asserted High - even though it isn't used in the design except to pass on the REFCLK.


For more information see:
 

解决方案


For cases where this core has been integrated into your design, follow the instructions as described in the error message and linked Answer Records above.

When implementing the example design, as provided by the CORE Generator tool, only Virtex-5 TXT devices are affected.

In the example design UCF for TXT devices, the GTX_DUAL location can be changed from GTX_DUAL_X0Y3 to GTX_DUAL_X0Y1 to avoid this error:
 

INST "core_wrapper/rocketio/GTX_1000X/tile0_v5_gtxwizard_i/gtx_dual_i" LOC = "GTX_DUAL_X0Y3";

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AR# 39193
日期 09/08/2014
状态 Active
Type 综合文章
器件 More Less
IP