解决方案
General LogiCORE IP Chroma Resampler Issues LogiCORE IP Chroma Resampler v3.01.a - Initial release in ISE 14.3 and Vivado 2012.3 tools
Supported Devices (ISE) - All 7 series
- All Virtex-6
- All Spartan-6
Supported Devices (Vivado) New Features - ISE 14.3 tool support
- Fixed clock domain issues with registers in the AXI4-Lite connection
Resolved Issues (ISE) - (Xilinx Answer 51589) Why does the Video IP stop working (i.e. producing TLAST output) when the optional AXI4-Lite interface is not selected in EDK?
- (Xilinx Answer 51483) Why does my Video IP lock up when a partial input frame is passed by the Video In to AXI-4 Stream input core?
Resolved Issues (Vivado) - (Xilinx Answer 50909) 2012.2 Vivado Simulator - Why do I receive errors or data mismatches when I attempt to simulate my IP in Vivado Simulator using the behavioral simulation flow?
- (Xilinx Answer 51483) Why does my Video IP lock up when a partial input frame is passed by the Video In to AXI-4 Stream input core?
Known Issues (ISE) Known Issues (Vivado)
LogiCORE IP Chroma Resampler v3.00.a - Initial release in ISE 14.2 and Vivado 2012.2 tools
Supported Devices (ISE) - All 7 series
- All Virtex-6
- All Spartan-6
Supported Devices (Vivado) New Features - ISE 14.2 tool support
- Added s_axi_aclk, s_axi_aclken, s_axi_aresetn to AXI4-Lite interface
Bug Fixes Known Issues (ISE) - (Xilinx Answer 51589) Why does the Video IP stop working (i.e. producing TLAST output) when the optional AXI4-Lite interface is not selected in EDK?
- (Xilinx Answer 51483) Why does my Video IP lock up when a partial input frame is passed by the Video In to AXI-4 Stream input core?
Known Issues (Vivado) - (Xilinx Answer 50909) 2012.2 Vivado Simulator - Why do I receive errors or data mismatches when I attempt to simulate my IP in Vivado Simulator using the behavioral simulation flow?
- (Xilinx Answer 51483) Why does my Video IP lock up when a partial input frame is passed by the Video In to AXI-4 Stream input core?
LogiCORE IP Chroma Resampler v2.00.a - Initial release in ISE 14.1 and Vivado 2012.1 tools
Supported Devices (ISE) - Virtex-7
- Kintex-7
- Artix-7
- Zynq-7000
- Virtex-6
- Spartan-6
Supported Devices (Vivado) - Virtex-7
- Kintex-7
- Artix-7
- Zynq-7000
New Features - ISE 14.1 tool support
- AXI4-Stream data interfaces
- Optional AXI4-Lite control interface
- Built-in, optional bypass and test-pattern generator mode
- Built-in, optional throughput monitors
- Supports spatial resolutions from 32x32 up to 7680x7680
- Supports 1080P60 in all supported device families
- Supports 4kx2k @ 24 Hz in supported high performance devices
- Supports up to 24 horizontal filter taps
Bug Fixes Known Issues
LogiCORE IP Chroma Resampler v1.0 - Initial release in ISE Design Suite 13.3
Supported Devices - Virtex-7
- Kintex-7
- Virtex-6 XC CXT/LXT/SXT/HXT
- Virtex-6 XQ LXT/SXT
- Spartan-6 XC LX/LXT
- Spartan-6 XA LX/LXT
- Spartan-6 XQ LX/LXT
New Features - ISE 13.3 tool support
- Support for:
- High-definition (1080p60) resolutions
- Up to 4095 total scan lines and 4095 pixels per scan line
- Converts between YCbCr:
- Supports both progressive and interlaced video
- Static, predefined, powers-of-two coefficients for low-footprint applications
- Configurable filters sizes with programmable filter coefficients for high performance applications
- Selectable processor interface
- EDK pCore
- General Purpose Processor
- Constant Interface
- Support for 8-, 10-, or 12-bit input and output precision
- Xilinx Streaming Video Interface (XSVI) bus simplifies connecting to other video IP
Bug Fixes Known Issues