Starting with MIG 7 series v1.4, the MIG tool now follows the following placement requirements for ODT and CKE as noted in the 7 Series FPGAs Memory Interface Solutions User Guide (UG586):
All existing 7 series MIG DDR3 or DDR2 designs need to be evaluated based on new MIG pin-out rules for the CKE and ODT signals.Previously, there were very few restrictions on the placement of these two signals.However, recently completed analysis shows possible timing issues (setup and hold violations) with the CKE and ODT implementation used by MIG in 13.3 and prior releases. A new CKE and ODT implementation where the signals are treated identically to the remaining Address/Control signals is required to remove timing issues. This new implementation prevents certain CKE and ODT pin assignments that were allowed by MIG in 13.3 and prior releases.
For many DDR3/DDR2 interface configurations generated by prior versions of MIG, the default pin assignments were already in compliance with the new pin-out rules. However, MIG was not checking against the new rules and might have violated them in some cases, so it is important to verify all existing designs. Existing designs found to be violating the new rules will require a board spin.
The ISE 13.4 softwarerelease of MIG will incorporate the new rules and RTL code for CKE and ODT.All existing MIG designs MUST upgrade to 13.4 to ensure compliance to the new pin-out rules and to receive the new RTL code that eliminates the possible timing issues.Note thatthe timing issues are related to the ODT/CKE implementation in MIG in 13.3 and prior releases. Therefore, regardless of the whether a pin-out violates or adheres to the new CKE/ODT rules, updated RTL code is required. Additionally, all new designs should be implemented with the 13.4 or later release. ISE Design Suite 13.4 will be available on January 18, 2012.
If you have any questions regarding the new rules, or require assistance in verifying compliance of an existing pin-out, please open aWebCaseand attach the UCF file and "mig.prj" for analysis.