This is a known issue with how the AXI Bridge for PCI Express is compiled by compxlib. The axi_enhanced_pcie_v#_0#_a library needs to compile all the modules with the "SIMULATION" compiler directive defined. Instead of compiling the enhanced library again, follow the instructions below to work around this issue.
Simgen is the tool that creates the simulation files in the "simulation/behavioral" directory. Before running Simgen, modify the MHS so that theC_PCIE_USE_MODEparameter is set to 3.0. When setting C_PCIE_USE_MODEto 3.0, the generated simulation files will be for General Engineering Sample (GES) silicon; however, for simulation purposes the functionality of the bridge will remain the same.
03/05/2012 - Corrected link to version resolved AR.
02/14/2012 - Initial Release
NOTE:The "Version Found" columnlists the version in which the problem was firstdiscovered. The problem might also exist in earlier versions, but no specific testing has been performedto verify earlier versions.