2. 技术支持
  3. AR# 4742: M1.5: Constraint Editor: Crashes when element group "<" is selected twice.
  4. AR# 47429: Xilinx Vivado HLS Solution Center - Top Issues

AR# 47429

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Xilinx Vivado HLS Solution Center - Top Issues

描述

This answer record covers current known issues related to the Vivado HLS tool.

This answer record is part of the Xilinx Vivado HLS Solution Center; see (Xilinx Answer 47428). 

The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS tools.

解决方案

Top Issues


(Xilinx Answer 43271) AutoESL - RTL Implementation results in "@E [IMPL-4] 'autoimpl' failed: 'xtclsh' cannot be found. Please check your PATH variable."
(Xilinx Answer 51042) Vivado HLS - RTL export result in "@E [IMPL-28] Failed to generate IP." or "@E [IMPL-4] 'xtclsh' cannot be found. Please check your PATH variable."
(Xilinx Answer 50152) Vivado HLS - Java 2 Platform Standard Edition binary has stopped working
(Xilinx Answer 50501) Vivado HLS - Running Verilog or VHDL simulation with ModelSim results in errors


Vivado HLS Known Issues

For Vivado HLS known issues, use the "Search" box on the upper left corner of the Xilinx Support Page. 

A filter can be applied to sort out known issues specific to a version. There are also issues that might affect multiple tool versions.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
47428 Xilinx Vivado HLS Solution Center N/A N/A

子答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
43271 Vivado HLS/AutoESL - RTL Implementation results in "@E [IMPL-4] 'autoimpl' failed: 'xtclsh' cannot be found. Please check your PATH variable." N/A N/A
50152 Vivado HLS - Java 2 Platform Standard Edition binary has stopped working N/A N/A
50495 AutoESL - Synthesis reports error "@E [SYNCHK-74] Recursive functions are not supported: recursion found in the following functions 'ap_fixed_base --> 'ap_fixed_base'" N/A N/A
50501 Vivado HLS - Running Verilog or VHDL simuation with ModelSim results in errors N/A N/A
51019 2012.2 Vivado HLS - Known Issues N/A N/A
51042 Vivado HLS - RTL export results in "@E [IMPL-28] Failed to generate IP" or "@E [IMPL-4] 'xtclsh' cannot be found. Please check your PATH variable." N/A N/A
57673 2013.2 Vivado HLS - Errors are returned "E [RTGEN-102] Read value from an output port / E [HLS-103] RTL output" N/A N/A
57454 2013.2 Vivado HLS - Design with integer divider w/ operand widths greater than 64-bit fail SystemC RTL co-simulation N/A N/A
57965 2013.2 Vivado HLS - Some DSP cores available for 7 series FPGA (Virtex-7) are not available for Virtex-6 FPGA N/A N/A
60699 Vivado HLS 2014.1: The GUI does not allow to select other parts than 7-Series like Virtex6 or Spartan6 but the TCL script support it. N/A N/A
61273 Vivado HLS 2014.2 - Directive view is not available for some source files N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
47433 Design Advisory Master Answer Record for Xilinx Vivado HLS Tool N/A N/A
47432 Xilinx Vivado HLS Solution Center - Documentation N/A N/A
47431 Xilinx Vivado HLS Solution Center - Design Assistant N/A N/A
AR# 47429
日期 07/17/2019
状态 Active
Type 解决方案中心
Tools
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