描述

解决方案

Step by Step Instructions:

1. Open Vivado 2014.4 or 2016.1
2. Enter the following command in the Vivado Tcl console:
   cd {<full directory of zynq_design_bd.tcl >}
3. Enter the following command in the Vivado Tcl console:
   source zynq_design_bd_2014_4.tcl" or "source zynq_design_bd_2016_1.tcl"
4. After block design creation has completed, generate the output products for the block design.
5. After the product is generated, generate the wrapper.
6. Generate the bitstream. 
7. After the bitstream is generated, open the implemented design.
8. In the File menu, click Export Hardware for SDK, and check all selections.
9. After SDK has launched, create the BSP and an empty application.
10. Import C code to the empty application project.
11. Set up the terminal to watch UART output.
12. Run the application.

Note: Be careful of the interrupt ID number. 

In this design ID 61 was defined in xparameters.h.

ID mapping is different in Vivado 2013.x and Vivado 2014.x or later, See (Xilinx Answer 62107) for more details.

Expected Results:

附件