The example design routes the EMIO GMII interface to FPGA I/Os to be used by an FMC card with an Ethernet PHY.An Inreviun TDS-FMCL-PoE card is used for this example.An alternate board can be the Inrevium FMCL-GLAN card.Note that the FMC pinout is different for each board.
A tip can be a snippet of code, a snapshot, a diagram or a full design implemented with a specific version of the Xilinx tools.It is up to the user to "update" these tips to future Xilinx tools releases and to "modify" the Example Design to fulfill his needs. Xilinx 对这些范例设计仅提供有限的支持。
|PS 和 PL|
Standalone with LwIP.
Linux has been tested as well.Linux would require a patch to set the PHY interface to GMII.Linux by default sets the external PHY to RGMII.
|Custom GMII synchronization pcore|
Step by Step Instructions
|Boards & Kits||