This answer record contains the Release Notes and Known Issues for the Video On Screen Display LogiCORE IP and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.
Video On Screen Display LogiCORE IP Page:
Obsoleted in 2019.1 and not recommended for new designs.
It is replaced by the Video Mixer LogiCORE IP which is a license free IP bundled with Vivado.
Supported devices can be found in the following three locations:
Please seek technical support via the Video Board of the Xilinx Community Forums.
The Xilinx Forums are a great resource for technical support. The entire Xilinx User Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
|v6.0 (Rev. 16)||2018.3||(Xilinx Answer 71806)|
|v6.0 (Rev. 15)||2017.4||(Xilinx Answer 70386)|
|v6.0 (Rev. 14)||2017.3||(Xilinx Answer 69903)|
|v6.0 (Rev. 13)||2016.4|
|v6.0 (Rev. 12)||2016.3|
|v6.0 (Rev. 11)||2016.2|
|v6.0 (Rev. 10)||2016.1|
|v6.0 (Rev. 9)||2015.3|
|v6.0 (Rev. 8)||2015.1|
|v6.0 (Rev. 7)||2014.4|
|v6.0 (Rev. 6)||2014.3|
|v6.0 (Rev. 5)||2014.2|
|v6.0 (Rev. 4)||2014.1|
|v6.0 (Rev. 3)||2013.4|
|v6.0 (Rev. 2)||2013.3|
|v6.0 (Rev. 1)||2013.2|
The table below provides answer records for general guidance when using the LogiCORE IP Video On Screen Display core.
|(Xilinx Answer 45913)||Does the OSD support different input frame sizes and rates?|
|(Xilinx Answer 50420)||Why are Operations Limited to Even Pixel Boundaries when using the OSD in 2 Channel Mode?|
|(Xilinx Answer 53619)||Why does the background change to another color when a GPU layer is enabled?|
Known and Resolved Issues
The following table provides known issues for the LogiCORE IP Video On Screen Display core, starting with v6.0, initially released in Vivado 2013.1.
Note: The "Version Found" column lists the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Answer Record||Title||Version Found||Version Resolved|
|(Xilinx Answer 67741)||Why do I see jagged lines when using the OSD as a Graphics Controller only?||v6.0||N/A|
|(Xilinx Answer 61999)||Critical warning about port difference||v6.0||N/A|
|(Xilinx Answer 57278)||What is the valid range for the Global Alpha Value for each layer?||v5.01.a||v6.0 (Rev. 2)|
|(Xilinx Answer 56274)||Vivado 2013.2 Multimedia Video and Imaging - How do I properly constrain the Video IP in my design?||v6.0||v6.0 (Rev. 2)|
|(Xilinx Answer 55980)||Why do I see write failures on the AXI4-Lite bus, when the AXI4-Stream clock is at a different frequency than the AXI4-Lite interface clock?||v6.0||v6.0 (Rev. 1)|
|(Xilinx Answer 54250)||Why does the Windows 32-bit C-Model crash when running the Example 3?||v3.0||N/A|
|01/04/2019||Added v6.0 (Rev. 12 - 16), to Version table, added obsolete information, and aupdated general information.|
|08/18/2016||Added v6.0 (Rev. 3), v6.0 (Rev. 4), v6.0 (Rev. 5), v6.0 (Rev. 6), v6.0 (Rev. 7), v6.0 (Rev. 8), v6.0 (Rev. 9), v6.0 (Rev. 10) and v6.0 (Rev. 11) to Version Table, Added (Xilinx Answer 67741).|
|09/10/2014||Added (Xilinx Answer 61999).|
|10/23/2013||Added v6.0 (Rev. 2) to Version Table, updated Known and Resolved Issues table for 2013.3.|
|08/28/2013||Added (Xilinx Answer 57278)|
|06/19/2013||Added v6.0 (Rev. 1) to Version Table, (Xilinx Answer 56274), (Xilinx Answer 55980)|