AR# 56989


LogiCORE IP AXI Video Direct Memory Access v6.0 - "FAILURE : Behavioral models do not support built-in FIFO configurations"


I am attempting to run a behavioral simulation using the AXI VDMA v6.0 in Vivado, but the following error occurs:

FAILURE : Behavioral models do not support built-in FIFO configurations. Please use post-synthesis or post-implement simulation in Vivado.

Post-synthesis simulation is much slower and has less visibility into the design hierarchy. 

Is there a better solution?


Another possible work-around is to execute the following tcl command:

set_property -dict [list CONFIG.Component_Name {axi_vdma_0 } CONFIG.c_enable_debug_all {1}] [get_ips axi_vdma_0]

This command should be applied in the tcl console while customizing the VDMA. 

After applying this property, you need to re-generate the output products for the core.

This command replaces the BUILT_IN FIFOs with block RAM FIFOs which have behavioral simulation support.


1) This work-around is recommended for simulation-only because there would be a resource penalty associated with using the block RAM FIFOs for implementation.

2) The built-in FIFOs are only used by the core when it is configured for asynchronous mode.



Answer Number 问答标题 问题版本 已解决问题的版本
54448 LogiCORE IP AXI Video Direct Memory Access - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions N/A N/A
AR# 56989
日期 08/19/2014
状态 Active
Type 综合文章
IP More Less
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