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AR# 61201

2014.2 Vivado Partial Reconfig - How do I debug Partial Reconfiguration designs?

描述

How do I debug Partial Reconfiguration designs?

解决方案

Build up the PR design requirements one at a time, checking the results at each step.

  • By changing the HD.RECONFIGURABLE property to HD.PARTITION, you avoid all of the exclusive placement, routing containment, site blocking and clock layout rules of PR, but you will still get boundary insulation and pblock placement.
    Run implementation with this set and examine the results (resource utilization, timing reports, etc.). 

  • If everything appears correct, add EXCLUDE_PLACEMENT to the pblock, forcing all static logic outside the pblock.
    This will give a better sense of overall density as well as inside the RP.
    (These properties are explained in more detail in UG909 and UG905.)

  • If everything appears correct, add CONTAIN_ROUTING to the pblock, forcing all of the RM routing to stay inside the pblock.
    (These properties are explained in more detail in UG909 and UG905.)

  • Note how the challenge increases as each condition is added.
    Design optimizations should be considered to help lower the overall density and complexity at each step.
AR# 61201
日期 06/20/2014
状态 Active
Type 综合文章
Tools
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