Version Found: v2.6 (Rev2)
Version Resolved and other Known Issues: See (Xilinx Answer 54646)
The core may run into erroneous state if it receives MSI packet when other packets (MWr, Cfg) are in progress.
This article is part of the PCI Express Solution Centre
(Xilinx Answer 34536) - Xilinx Solution Center for PCI Express
This is a known issue to be fixed in a future release of the core.
To resolve the issue, please install the patch attached to this answer record as described below.
After the patch is installed, the version of the AXI Memory Mapped to PCI Express core should indicate: v2.7 (Rev. 1).
Note: "Version Found" refers to the version where the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
10/14/2015 - Initial release