AR# 67573


Virtex-7 FPGA VC709 Connectivity Kit - UG887 (v1.5) - Table 1-6 U1 Pin for Flash address is incorrect


(UG887) VC709 Evaluation Board for the Virtex-7 FPGA User Guide (v1.5), includes the BPI flash memory connections to the FPGA in Table 1-6.

FLASH_A21 and FLASH_A22 nets are both assigned to the FPGA (U1) Pin, is this correct?



There is a typo in Table 1-6 of UG887 (v1.5).

FLASH_A21 should be assigned to pin BA40 of U1 FPGA, while FLASH_A22 should be assigned to pin BA39 of U1 FPGA.

This is corrected in (v1.5.1) of UG887.




Answer Number 问答标题 问题版本 已解决问题的版本
51901 Virtex-7 FPGA VC709 连接套件 — 已知问题与版本说明的主要答复记录 N/A N/A
AR# 67573
日期 08/25/2016
状态 Active
Type 综合文章
Boards & Kits
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