UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 67581

Video Deinterlacer v4.0 (Rev. 9) - Why does the provided demo_tb simulation fail to generate any output?

描述

Why does the provided demo_tb simulation fail to generate any output?

 

When attempting to simulate the Video Deinterlacer IP v4.0 with the demo test bench provided with the IP, the input to the Video Deinterlacer stays at "0" and no output is generated from the IP.

解决方案

This is a known issue with the Deinterlacer v4.0 (Rev. 9) and later.

There are no plan to address this as the Video Deinterlacer is not recommended for new designs.

Users are recommended to use the Video Processing Subsystem's Deinterlacer configuration, (Xilinx Answer 65449).

AR# 67581
日期 04/03/2018
状态 Active
Type 综合文章
Tools
  • Vivado Design Suite - 2016.2
IP
  • Video Deinterlacer
的页面