AR# 68143

UltraScale+ MPSoC DDR4 - Tactical Patch - IP GUI hangs and crashes for specific settings

描述

Version Found: v2.1

Version Resolved: See (Xilinx Answer 69035)

The DDR4 IP GUI has been seen to hang and crash when the following settings are used:

  • Targeting an XCZU7E-FFVC1156-i-1 FPGA device
  • DDR4 component device is used
  • "Chip Select" is disabled
  • The DRAM width is changed to 16 (a hang occurs here)

解决方案

To fix this issue an IP patch must be installed. To install the patch, extract the contents of "AR68143_Vivado_2016_3_preliminary_rev1.zip" to the 2016.3 install directory (for example, C:\Xilinx\Vivado\2016.3\), then open Vivado 2016.3 and generate the DDR4 IP.

Note: This tactical patch is only compatible with the Vivado 2016.3 and DDR4 IP v2.1.

Revision History:

11/01/2016 - Initial Release

附件

文件名 文件大小 File Type
AR68143_vivado_2016_3_preliminary_rev1.zip 16 MB ZIP

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
69035 UltraScale/UltraScale+ DDR4 - Release Notes and Known Issues N/A N/A
AR# 68143
日期 12/21/2017
状态 Active
Type 已知问题
器件
Tools
IP