AR# 68943

UltraScale DDR4 - MT40A1G16WBU-083E component with xcku115-flvb2104-2-e fails to generate output products


Version Found: v2.2

Version Resolved: See (Xilinx Answer 69035)

The UltraScale DDR4 IP added support for MT40A1G16WBU-083E in version 2.2.

If the specified device is xcku115-flvb2104-2-e and the Data Width is set to 80 bits, the design will fail to generate output products with the following messaging:

WARNING: [Mig 66-114] Unable to find the required number (4) of consecutive empty bank(s) to auto place all the memory bytes.
[#UNDEF] Not able to find enough and valid I/O's in the device selected to fit this configuration. Require minimum of 138 enough and valid I/O's.
Please choose bigger device to accommodate or modify the memory configuration (for eg. reducing Datawidth or opting for low density memory part etc..) to fit in this device.


To work around this issue, follow the steps below:

  1. Open Vivado 2017.1.
  2. Create a project with xcku115-flvb2104-2-e specified as a device.
  3. In the Tcl console type the following:
set_param memory.reset_in_non_address_bank true
  1. Customize DDR4 and select MT40A1G16WBU-083E as the component.
  2. Configure the Component for 80-bits Data Width.
  3. Generate Output Products.



Answer Number 问答标题 问题版本 已解决问题的版本
69035 UltraScale/UltraScale+ DDR4 - Release Notes and Known Issues N/A N/A
AR# 68943
日期 08/29/2017
状态 Active
Type 已知问题