AR# 69141

UltraScale/UltraScale+ LPDDR3 IP - Memory Model Simulation Errors for QuestaSim and Other Simulators

描述

Version Found: LPDDR3 v1.0 in Vivado 2017.1

Version Resolved: See (Xilinx Answer 69040)

The following simulation model error is displayed in the log file when I run LPDDR3 IP simulation with the QuestaSim simulator:

** Error (suppressible): (vsim-8630) ../../../imports/mobile_ddr3.v(536): Infinity results from division operation.
** Error (suppressible): (vsim-8630) ../../../imports/mobile_ddr3.v(606): Infinity results from division operation.

The following simulation model error is displayed in the log file when I run LPDDR3 IP simulation with any simulator:

sim_tb_top.u_comp_lpddr3.ERROR at time 4202970860: tINIT3 violation

解决方案

In either case the simulations will pass and these messages can be ignored.

This is targeted to be fixed in the next release of Vivado.

链接问答记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
69040 UltraScale/UltraScale+ LPDDR3 IP - 发布说明与已知问题 N/A N/A
AR# 69141
日期 12/15/2017
状态 Active
Type 综合文章
器件 More Less
Tools
IP