AR# 69179

Vivado 2017.1 [BRAM inference] - How to achieve better block RAM utilization from Vivado synthesis when using asymmetric port widths - Inferred RAM and XPM (Simple Dual Port)


When using asymmetric ports in simple dual port RAM, synthesis consumes more block RAM (BRAM) blocks than is required.

The tools should infer the correct number of BRAMs.

Example 1:

An XPM Memory (SDPRAM) where Port A is 512 x 64 and Port B is 2k x 16.

Only a single RAMB36 block should be required for this.

When implemented, synthesis will use two RAM36 blocks.

A single RAM36 block should be all that is required for this.

This can also occur when using XPM FIFO macros.

Example 2:

A simple dual port RAM of inferred memory where port A is 48bit x 512 and port B is 12bit x 2048.

Here, synthesis uses 1 RAMB36 and 1 RAMB18, when just one RAMB38 should be needed instead.


It is recommended to use the following parameter setting for better BRAM utilization when using asymmetric port widths configuration in simple dual port RAM (Inferred or XPM Memory). 

This applies to both Vivado 2017.1 and 2017.2.

The parameter setting is:

set_param synth.elaboration.rodinMoreOptions " rt::set_parameter useAsymSDPMode true"

AR# 69179
日期 11/29/2017
状态 Active
Type 综合文章