Programmable inversions for data inputs are not supported for simple registered inputs or simple registered outputs (such as FDCE, FDPE, FDRE, and FDSE) and DDR outputs (ODDRE1) for UltraScale and UltraScale+.
For UltraScale and UltraScale+, component primitives for simple registered inputs (IFD) and outputs (OFD) and ODDRE1 do not support the programmable inversion for data inputs.
Vivado 2017.1 and previous versions incorrectly allow the use of the programmable inversion. It will generate the bitstream but the D port will not be inverted in hardware.
Note: when simulating these primitives in UltraScale and UltraScale+ (simple registered inputs (IFD) and outputs (OFD) and ODDRE1), the simulation will not match hardware operation if the programmable inversion is used (IS_D_INVERTED=1, IS_D1_INVERTED=1, IS_D2_INVERTED=1).