What is the basic methodology for setting up Base Address Registers in a PCI system?
The Base Address Registers (BAR) are used if the PCI agent needs to utilize memory or I/O address space. It is a 32-bit register in the Configuration Space, the first of which begins at address 0x10. In the Xilinx PCI LogiCORE, the "cfg.v" or "cfg.vhd" has information as to what size and type of BAR is implemented:
`define ENABLE 1'b1
`define SIZE16M 32'hff00_0000
`define NOFETCH 1'b0
`define TYPE00 2'b00
`define MEMORY 1'b0
assign CFG = `ENABLE ;
assign CFG[32:1] = `SIZE16M ;
assign CFG = `NOFETCH ;
assign CFG[35:34] = `TYPE00 ;
assign CFG = `MEMORY ;
For more information on the Base Address Register, refer to section 6.2.5 of the PCI Local Bus Specification, version 3.0.
When the system is powered up, the host must determine the memory size that the PCI agent requires and assign it a starting address. The former is accomplished by writing 0xFFFFFFFF to the BAR, and then reading back the same BAR. In the above example, when the BAR is read back, it will return 0xFF000000. The lowest four bits are for Prefetch, Type, and Type Indicator. The middle 20 bits are hardwired to 0, for reasons explained below. This signals to the host that only the top 8 bits are writable.
The host will then allocate 16 MB of memory space, and write the BAR, this time giving it a valid address (e.g., 0xAA00000000). This tells the agent that its 16 MB of memory space begins at the address AA00000000. According to the PCI specification, all address spaces must be naturally aligned, so it is not possible to have a 16 MB address space begin at a memory address not divisible by 16 MB. This is why the middle 20 bits would be hardwired to 0. The host must know what the size is, and the agent would not need those bits to store an address.
For a memory BAR, the smallest possible size would leave [31:4] writable, which would be 16 bytes. By the same token, the largest size would only have 31 writable bits, which corresponds to a 2 GB size. As I/O BARs need only the two LSBs for type indication, the smallest size would be 4 bytes. According to the PCI specification, the largest I/O size is 256 bytes.