2. 技术支持
  3. AR# 7250: 4.2i Foundation Simulator - Memory write address exceeds defined memory bounds
  4. AR# 72505: SMPTE UHD-SDI RX Subsystem - Why is there a missing line every 2 frames when receiving 3G-SDI (1080p60) Level B with an SMPTE UHD-SDI RX subsystem?

AR# 72505

SMPTE UHD-SDI RX Subsystem - Why is there a missing line every 2 frames when receiving 3G-SDI (1080p60) Level B with an SMPTE UHD-SDI RX subsystem?

描述

When receiving 3G-SDI (1080p60) Level B on a UHD-SDI Receiver Subsystem I observe that the last line is missing every 2 frames.

What is the issue and how can I resolve it?

解决方案

This is a known issue with the SMPTE UHD-SDI RX Subsystem v2.0 (Rev. 3) and earlier versions.

This issue will be fixed in Vivado 2019.2 and later versions.

  • Vivado 2019.1 - Users can download the SMPTE UHD-SDI RX Subsystem Patch from (Xilinx Answer 72506) to work around this issue.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
68766 SMPTE UHD-SDI RX Subsystem — Vivado 2017.3 工具及以后版本的版本说明和已知问题 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
72506 2019.1 - SMPTE UHD-SDI RX Subsystem v2.0 (Rev. 3) - Patch Updates for the SMPTE UHD-SDI RX Subsystem v2.0 (Rev. 3) N/A N/A
AR# 72505
日期 07/05/2019
状态 Active
Type 已知问题
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