TSN Endpoint IP

产品描述

Push your network performance to the absolute maximum while staying compliant to open standards and preparing your system for certification.

With modern networked systems, message transmission gets increasingly more difficult when more devices are connected, and missed messages mean that mission-critical responses to incoming threats aren't triggered in time.

DornerWorks TSN Endpoint IP is a certifiable packaged IP block that provides deterministic Ethernet through TSN to any AMD UltraScale+ design. DornerWorks TSN Endpoint IP makes it simple to add a new or legacy system onto a TSN network without adding a lot of software overhead.

The DornerWorks TSN Endpoint IP consists of a 1G Ethernet MAC, PTP core, time aware shaping core, and Credit base shaping core. This FPGA based TSN solution provides a certifiable design that can scale efficiently with evolving standards. The time aware shaping core in logic allows for scheduling as refined as 8ns. The PTP core includes packet transmission and calculations in logic so no additional software is needed. The TSN endpoint IP allows for up to 8 Traffic Queues, or Quality of Service (QoS).

Schedule a meeting to learn how the DornerWorks TSN Endpoint IP can enable your system with a certifiable, hardware based, TSN solution.


主要特性与优势

  • Allows selection of any of the QoS levels to be pre-emptible or express traffic
  • Time-aware shaper - IEEE 802-1Qbv
  • gPTP - IEEE 802.1AS slave and master
  • Certifiable
  • 8 QoS - IEEE 802.1Q-2018
  • Credit-based shaping - IEEE 802.1 Qav

器件实现矩阵

面向此核实现范例的器件使用矩阵。联系供应商了解更多信息。

系列 器件 速度等级 工具版本 硬件验证? LUT BRAM DSP48 CMT GTx FMAX (Mhz)
Zynq-UP-MPSoC Family XCZU9EG -2 Vivado ML 2021.2 Y 26171 23234 17 24 0 0 125

IP 质量指标

综合信息

数据创建日期 Jul 31, 2023
当前 IP 修订号 1.0
当前修订日期已发布 Jul 13, 2023
第一版发布日期 Jul 13, 2023

Xilinx 客户的生产使用情况

Xilinx 客户成功生产项目的数量 0
可否提供参考? N

交付内容

可供购买的 IP 格式 Source Code, Netlist
源代码格式 VHDL
是否包含高级模型? N
提供集成测试台 N
是否提供代码覆盖率报告? N
是否提供功能覆盖率报告? N
是否提供 UCF? XDC
商业评估板是否可用? Y
评估板所用的 FPGA Zynq UltraScale+ MPSoC
是否提供软件驱动程序? Y
驱动程序的操作系统支持 Petalinux

实现方案

代码是否针对 Xilinx 进行优化? N
定制 FPGA 优化技术 None
所支持的综合软件工具及版本 Vivado Synthesis
是否执行静态时序分析? N
AXI 接口 AXI4-Stream
是否包含 IP-XACT 元数据? N

验证

是否有可用的文档验证计划? Yes, document only plan
测试方法 Directed Testing
断言 N
收集的覆盖指标 None
是否执行时序验证? Y
可用的时序验证报告 N
所支持的仿真器 Xilinx lSim / 2021.2

硬件验证

在 FPGA 上进行验证 N
已通过的行业标准合规测试 N
是否提供测试结果? N