Reed Solomon Decoder LogiCORE IP 产品和软件需求

Hardware Evaluation Time Out Period * : ~ 2-3 hrs


LogiCORE™ 版本 支持 AXI4 软件支持 支持的器件系列
Reed Solomon Decoder v9.0 AXI4-Stream Vivado® 2021.1 Versal™ ACAP
Kintex®-7 UltraScale+™
Virtex®-7 UltraScale+
Zynq®-7000 UltraScale+
Kintex UltraScale™
Virtex UltraScale
Kintex-7 / -2L
Virtex-7 / -2L / XT
Reed Solomon Decoder v8.0 AXI4-Stream ISE® 14.1 Artix-7
Kintex-7 / -2L
Virtex-7 / -2L / XT
Virtex-6 CXT / HXT / LXT / SXT / -1L
Spartan®-6 LXT / LX
Reed Solomon Decoder v7.1 早期 ISE 14.1 Artix-7
Kintex-7 / -2L
Virtex-7 / -2L / XT
Virtex-6 CXT / HXT / LXT / SXT / -1L
Virtex-5 LXT / SXT FXT TXT
Virtex-4 FX/SX/LX
Spartan-6 LX / LXT
Spartan-3A / 3AN / 3A-DSP
Spartan-3 / 3E

Download the required software from the Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.

* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.

The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.