Xilinx 现在是AMD 的一部分更新的隐私条款
  2. IP 核
  3. Reduced Media Independent Interface (RMII)

Reduced Media Independent Interface (RMII)

简介

产品描述

The MII to RMII LogiCORE is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on a Xilinx 10/100 Ethernet MAC core to a a 6-pin Reduced Media Independent Interface (RMII) interface, allowing the MAC to connect to RMII compliant PHYs.A fixed 50 MHz reference clock synchronizes the MII_to_RMII with both interfaces.

主要特性与优势

  • Option to specify fixed 10 or 100 Mbit per second throughput
  •  Automatic detection of Receive side throughput 
  • Fixed clock frequency of 50 MHz Designed to RMII Consortium specification 
  • Free core provided with the Embedded Development Kit (EDK)

技术支持

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