The LogiCORE IP AXI Interrupt Controller (AXI INTC) concentrates multiple interrupt inputs from peripheral devices to a single interrupt output to the system processor. This AXI INTC core is designed to interface with the AXI4-Lite protocol.
Describes the AXI Interrupt Controller (AXI INTC) core which receives multiple interrupt inputs from peripheral devices and merges them to a single interrupt output to the system processor.
This application note demonstrates a simple embedded display system using the LogiCORE IP AXI Thin Film Transistor (TFT) core on the Kintex-7 FPGA KC705 Evaluation Kit.
Demonstrates real-time video traffic across two 7 series FPGA evaluation boards. Also demonstrates the capabilities of the LogiCORE IP AXI Chip2Chip Bridge core using the LogiCORE IP Aurora 64B/66B core as the Physical Layer (PHY).