DisplayPort Subsystem

概述

产品描述

AMD DisplayPort® 解决方案包括设计用于 VESA DisplayPort V1.2 规范的 DisplayPort TX 和 RX 子系统以及设计用于 VESA DisplayPort V1.4 规范的 Vivado 2018.1(2018 年 4 月)中提供的 DisplayPort 1.4 TX 和 RX 子系统。这些解决方案可帮助用户按照 VESA DisplayPort 规范的定义实现 DisplayPort 视频接口。DisplayPort 是一种被高清电视、个人笔记本电脑和 PC 监视器等消费电子领域行业领导者所支持的高速串行接口标准。该协议接替 VGA 和 DVI 标准,支持视频分辨率高达 8 kx4k 的视频和 adds 音频。

DisplayPort LogiCORE IP 支持 UltraScale™ 和 7 系列 FPGA。

DisplayPort 1.4 子系统支持 UltraScale™ 和 UltraScale+™ FPGA,并且还支持 DisplayPort V1,2 规范。

为了帮助用户创建支持 DisplayPort 接口的解决方案,AMD 针对 DisplayPort 发送与 DisplayPort 接收提供了预封装子系统。这些子系统将支各种通用功能(视频时序生成、AXI 桥接以及可选 HDCP 功能等视频接口)与 DisplayPort LogiCORE 集成,开盒即可投入使用。

AMD 在 Vivado 版本 (2017.2) 中淘汰了独立 DisplayPort LogiCORE ,因此强烈建议用户在所有新设计中使用 DisplayPort 子系统。


主要特性与优势

  • 开盒即用的子系统产品
  • 源端 (Tx ) 和宿端 (Rx) 控制器执行编码/解码
  • SST 和 MST 支持
  • 1、2 或 4 像素宽度的主链路实现高达 4096x2048 的监视器分辨率;用户可通过 4 像素宽度获得高达 600 Mhz 的视频像素时钟
  • 面向仅亮度(luminance only)模式和灰阶视频用户的增强色彩格式
  • 参数化的每色彩数位
  • 自动的信道速率和宽度协商(1.6 或 2.7 或 5.4 Gbps;1, 2 或 4 信道)
  • HD 视频及可选的辅助音频支持 8 通道

DisplayPort 1.4 Subsystem 主要性能与优势

  • 8b/10b 编码和加扰,以降低 EMI
  • DisplayPort Source 和接收器参考设计
  • 接收器/Source SW 驱动程序
    • Link 和 Stream 决策制定者
    • 拓扑发现和管理
    • 负载管理和虚拟信道映射
    • EDID 解析和 DPCD
  • 可选 HDCP 支持
  • 与 DisplayPort Subsystem 相同
  • 增加 8.1 Gbps /通道以处理高达 8K 的显示器分辨率
  • Vivado 中的 DisplayPort 源端和宿端参考设计

资源利用率


技术支持

技术文档

主要资料

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Results 1-15 of 15
Document
文件类型: Data Sheets
The Xilinx LogiCORE IP DisplayPort interconnect protocol is designed for transmission and reception of serial-digital video for consumer and professional displays. DisplayPort is a high-speed serial interface standard supported by PC chipsets, GPU’s and display controllers, HDTV and monitors from industry leaders and major silicon manufacturers. This document contains information about the AXI4 version of the core.
Document
文件类型: Product Guides
The DisplayPort™ interconnect protocol is designed for transmission and reception of serial-digital video for consumer and professional displays. Xilinx DisplayPort IP offers both Source (TX) and Sink (RX) functionality for high performance video, such as 4Kx2K resolution.
Webpage
文件类型: Product Guide
Implements the functionality of a video source as defined by the VESA DisplayPort standard v1.2a and supports driving resolutions of up to Ultra HD (UHD) at 60 fps.
Document
文件类型: Product Guides
This document describes the HDCP 1.3 and 1.4 protocol IP designed for transmission of audiovisual content securely between two devices that are HDCP-capable.
Webpage
文件类型: Product Guides
Describes the core designed for enabling plug-and-play connectivity with Video (DisplayPort and HDMI) MAC transmit or receive subsystems.
Associated File(s):
Webpage
文件类型: Product Guide
Describes the subsystem that is a plug-in solution for serial digital video data reception in large video systems with video resolutions up to UHD@ 60 fps. The subsystem provides easy to use mode selection and automated customization.
Document
文件类型: Product Guides
These IPs implements the HDCP version 2.2 specification used to securely send audiovisual content from an HDCP 2.2 protected transmitter to HDCP 2.2 protected downstream receivers. Typically, HDCP 2.2 is used to encrypt content at Ultra-High Definition while HDCP 1.4 is used at lower resolutions.
Webpage
文件类型: Product Guide
Implements the functionality of a video source as defined by the Video Electronics Standards Association (VESA) DisplayPort standard v1.4 and supports driving resolutions of up to Full Ultra HD (FUHD) at 30 fps. The subsystem provides highly integrated IP blocks requiring very little customization.
Webpage
文件类型: Product Guide
The subsystem is a plug-in solution for serial digital video data reception in large video systems and supports video resolutions of up to Full Ultra HD (FUHD) at 30 fps. The subsystem provides ease of use in selecting the required mode with automated customization.
Webpage
文件类型: Product Guide
Introduces the AMD Versal™ Adaptive SoC GT Controller for DisplayPort and SDI bridge IP.
Webpage
文件类型: Product Guide
Implements the functionality of a video source as defined by the Video Electronics Standards Association (VESA) DisplayPort standard v2.0 and supports driving resolutions of up to Full Ultra HD (FUHD) 8K at 60 fps.
Webpage
文件类型: Product Guide
Implements the functionality of a video source as defined by the Video Electronics Standards Association (VESA) DisplayPort standard v2.0 and supports receiving resolutions of up to Full Ultra HD (FUHD) 8K at 60 fps.
Webpage
文件类型: Product Guide
Implements the functionality of a video source as defined by the Video Electronics Standards Association (VESA) DisplayPort standard v2.0 and supports receiving resolutions of up to Full Ultra HD (FUHD) 8K at 60 fps.
Document
文件类型: User Guides
DisplayPort is an emerging standard for the inter-connection of video devices and is envisioned as a replacement for the current DVI and HDMI interfaces. This guide covers the implementation and usage of the Xilinx DisplayPort core.
Document
文件类型: Customer Notices
To communicate that Xilinx® is discontinuing some Development Systems LogiCORE™ Products and Virtex® Kits.
Results 1-15 of 15