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Xilinx provides the AXI Datamover core which provides high throughput transfer of data from AXI4 memory mapped domain to AXI4-Stream domain and back.
The AXI Datamover is a key Interconnect Infrastructure IP which enables high throughput transfer of data between AXI4 memory mapped domain to AXI4-Stream domain. The AXI Datamover provides MM2S and S2MM AXI4-Stream channel which operate independently in a full duplex like method. The AXI Datamover is a key building block for the AXI DMA core and enables 4 kbyte address boundary protection, automatic burst partitioning, as well as providing the ability to queue multiple transfer requests using nearly the full bandwidth capabilities of the AXI4-Stream protocol. Furthermore, the AXI Datamover provides byte-level data realignment allowing memory reads and writes to any byte offset location.